D-UPHEIM: Multi-Core SoC Performance and Efficiency Matrix

A unified matrix dataset integrating physical platform state telemetry with low-level hardware performance indicators for multi-core system-on-chip (SoC) optimization. Created by Jamie Davis and last updated on June 2, 2026, the dataset is formatted as a packed fixed-point matrix to facilitate lookups within real-time scheduling paths. It was generated and verified through cycle-accurate Hardware-in-the-Loop (HIL) testing streams.

Use Cases

• Optimizing system-wide performance based on unified hardware and runtime state data.
• Dynamically reclaiming unused processor overhead in safety-critical OS kernels based on integrated telemetry.
• Benchmarking real-time scheduling path efficiency using the packed fixed-point matrix format.
• Profiling efficiency across heterogeneous core configurations using HIL-verified data.

Strengths

• Formatted for lookups in under 45 nanoseconds, as stated in the description.
• Generated and verified through cycle-accurate Hardware-in-the-Loop (HIL) testing.
• Integrates multiple data sources like thermal headroom metrics and cache stride tracking values.

Limitations

• Dataset size is 305.0 B, indicating a very limited scope.
• Column-level documentation is absent; field semantics must be inferred after download.
• Row count is unknown, which may limit suitability assessment.

Provenance

Source

Jamie Davis via figshare

Collection Method

Generated and verified through cycle-accurate Hardware-in-the-Loop (HIL) testing streams.

Freshness

Last updated 2026-06-02 21:58:26; freshness should be verified.