Davis Logic V2: Fixed-Point Low-Pass Filter Core for Embedded Systems

A 4.0 KB text file containing a deterministic digital biquad implementation of a Direct Form I Low-Pass Filter. The core is optimized for 32-bit bare-metal environments like ARM Cortex-M, ESP32, and STM32, authored by Jamie Davis and last updated on June 2, 2026. It uses fixed-point representation with q15_16_t signed fractional types to eliminate floating-point unit overhead.

Use Cases

• Implementing deterministic low-pass filtering in motor control loops based on the described ultra-low latency architecture.
• Optimizing sensor data pipelines for timing-critical applications based on the absence of heap allocations and dynamic arrays.
• Deploying digital signal processing on microcontrollers without FPUs based on the fixed-point q15_16_t implementation.

Strengths

• The implementation is free of standard library heap allocations, satisfying critical sub-microsecond timing requirements.
• Uses fixed-point q15_16_t representation to eliminate FPU cycle overhead on target microcontrollers.
• Direct Form I implementation is chosen to avoid internal overflow saturation when shifting historical state parameters.

Limitations

• Row count is unknown, which may limit suitability assessment for large-scale processing.
• Column-level documentation is absent; field semantics must be inferred after download.
• The dataset is very small at 4.0 KB, indicating a limited scope focused on a single filter core.

Provenance

Source

Jamie Davis via figshare

Collection Method

Likely a designed and documented hardware description or software core.

Freshness

Last updated 2026-06-02 11:26:16; freshness should be verified.