Davis Logic V2: Invariant Hysteresis Debouncer and Line Simulator

Davis Logic V2 is an open-access reference dataset providing an immutable, real-time hysteresis state debouncer core for bare-metal frameworks. It includes a branchless integer calculation engine and an automated testbench script to simulate unstable electrical connections. The dataset was authored by Jamie Davis and published on figshare in 2026.

Use Cases

• Testing signal stability algorithms based on the described branchless integer calculation engine.
• Simulating and analyzing transient network packet drops based on the described line chatter testbed.
• Benchmarking computational performance for real-time debouncing tasks based on the specified 12 CPU clock cycle processing.

Strengths

• Includes a branchless evaluation engine that processes link stability verifications in exactly 12 CPU clock cycles.
• Contains an automated testbench script that simulates an unstable connection over 10 consecutive ticks.
• Released under a permissive Creative Commons Attribution 4.0 International (CC BY 4.0) license.

Limitations

• Dataset size is only 2.3 KB, indicating a very limited scope focused on core logic rather than extensive data.
• Column-level documentation is absent; field semantics must be inferred after download.
• Row count is unknown, which may limit suitability assessment for large-scale analysis.

Provenance

Source

Jamie Davis (Independent Systems Architect)

Collection Method

Engineered as part of the Davis Logic V2 bare-metal framework.

Freshness

Last updated 2026-06-01 10:23:21