Dahlia: Predictable Accelerator Design with Time-Sensitive Affine Types

A replication package for a research article proposing a type system for predictable hardware accelerator design. The package likely contains code and data related to the Dahlia language, which compiles to high-level synthesis C++. The work was authored by Rachit Nigam from Cornell University.

Use Cases

• Evaluating the performance of the proposed time-sensitive affine type system based on the described methodology.
• Reproducing experiments on reducing HLS parameter spaces as mentioned in the description.
• Comparing Pareto-optimal accelerator designs generated by the Dahlia language against traditional HLS heuristics.

Strengths

• The dataset is directly linked to a published research article, providing academic context.
• The description details a specific technical approach involving a time-sensitive affine type system.

Limitations

• Column-level documentation is absent; field semantics must be inferred after download.
• Row count is unknown, which may limit suitability assessment.
• Last update date is unknown; freshness unverified.

Provenance

Source

Cornell University

Collection Method

Created as a replication package for the associated research article.